A Leader in Hardware-Assisted Verification

At the forefront of hardware-assisted verification, AMD revolutionizes SoC system modeling and verification through emulation and prototyping using adaptive SoCs and FPGAs. With over 17 years of expertise, AMD leads the industry in delivering fast, accurate emulation and prototyping solutions.

Six Generations of Leadership in Hardware-Assisted Verification

AMD System Logic Cells
Industry’s Highest Capacity Adaptive SoC
  • Delivered six generations of the world’s largest adaptive SoC1.
  • Enables industry solutions with up to 2X the capacity2 and 2X the performance3 compared to prior generations.
Advanced Design Visibility and Debug Capability
  • Enhanced debug hardware capabilities to shorten design verification cycles.
  • Continued investment in debug tools and IP for performant design visibility.
Compile Tools Built for Emulation and Prototyping
  • AMD Vivado™ ML machine learning enhanced reporting and iterative design runs help maximize developer productivity.
  • AMD Vivado next-generation place-and-route features scale to ever larger FPGAs with significant improvements to QoR and compile time.

Applications

Traditional and Desktop Prototyping

Traditional and Desktop Prototyping

Provides an extensive debug and IP ecosystem for traditional, desktop, and IP prototyping.
 
  • IP block and subsystem prototyping
  • In-circuit peripheral validation
  • Firmware development and test
  • Digital twins 
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Portfolio

AMD Versal Premium VP1902
AMD Versal™ Premium VP1902 Device: World’s Largest Adaptive SoC4

Advancing Technologies with Emulation and Prototyping
 

Find out how the AMD Versal™ Premium VP1902 adaptive SoC enables the advancement of new technologies and helps push the boundaries of what’s possible.

 

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Vivado ML Enterprise Edition
AMD Vivado™ ML Design Suite

Reduce Compile Times and Enhance Performance
 

Learn how advanced features in AMD Vivado design software helps hardware designers reduce compile times and design iterations, while more accurately estimating power for AMD adaptive SoCs and FPGAs.

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Case Studies

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Prototype with AMD Versal Premium

AMD Versal™ Premium VP1902 Device: World’s Largest Adaptive SoC
  • 2X higher logic density2 compared to the Virtex™ UltraScale+™ VU19P device
  • 2X aggregate I/O bandwidth5 and 2.3X transceiver bandwidth6 for scalability
  • Reduced I/O latency and two-by-two SLR array for improved system performance
Versal Premium VP1902 Adaptive SoC
Footnotes
  1. Based on AMD internal analysis, May 2023. (VER-009)
  2. Based on AMD internal analysis in May 2023, comparing the number of system logic cells of the Versal Premium VP1902 device versus the Virtex UltraScale+ VU19P device. (VER-001)
  3. Based on AMD internal system clock performance analysis in May 2023, comparing the Versal Premium VP1902 device to the Virtex UltraScale+  VU19P device across a range of design sizes and cut nets. (VER-006)
  4. Based on AMD internal analysis in May 2023 with a 6-input LUT count to compare the Versal Premium VP1902 device versus the Intel Stratix 10 GX 10M FPGA. (VER-002)
  5. Based on AMD Labs testing using an A6865 package to simulate the XPIO data rate performance of an AMD Versal Premium VP1902 device versus the published data rate of an AMD Virtex UltraScale+ VU19P FPGA. Actual results will vary. (VER-003)
  6. Based on AMD Labs calculation in May 2023 of aggregate transceiver bandwidth of a Versal Premium VP1902 device B6865 package versus a Virtex UltraScale+ VU19P device B3824 package, assuming GTY/GTYPs running at 32G and GTMs running at 56G. (VER-005)