Documentation
Explore all Zynq UltraScale+ XA MPSoCs white paper, data sheets, documentation and more.
Tried. Trusted. Long Lasting.
With typical lifespans extending well past 15 years, you can depend on AMD devices for the life of your design—extending AMD 7 Series FPGAs and adaptive SoCs through 2040 and AMD UltraScale+™ FPGAs and adaptive SoCs through 2045.
AMD Zynq™ UltraScale+™ XA MPSoC Product Advantages
The Automotive-grade AMD Zynq™ UltraScale+™ XA MPSoC family is qualified according to AEC-Q100 test specifications with full ISO26262 ASIL-C level certification. The product integrates a feature-rich 64-bit quad-core Arm® Cortex®-A53 and dual-core Arm Cortex-R5 based processing system (PS) and AMD programmable logic (PL) UltraScale architecture in a single device. This scalable solution is ideally suited for various automotive customer platforms by delivering the right performance/watt while integrating critical functional safety and security features.
Smarter, Optimized, and Secure Solution
- Innovative Arm + FPGA architecture for differentiation, analytics & control
- Extensive OS, middleware, stacks, accelerators, and IP ecosystem
- Multiple levels of hardware and software security
Unmatched Integration, Performance, and Power
- Integration delivering the de facto programmable platform
- Up to 5X system level performance per watt over Zynq 7000 SoCs
- Architected to deliver lowest system power
- MicroBlaze™ and MicroBlaze V processor soft IP
Proven Productivity
- Most flexible & scalable platform for maximum reuse and best TTM
- Industry leading design tools, C/C++, Open CL design abstractions
- Largest portfolio of SW & HW design tools and reference designs
Product Table
Processing System (PS)
| Features | All Devices |
|---|---|
| Application Processing Unit | Quad-core Arm Cortex-A53 MPCore with CoreSight; NEON & Single/Double Precision Floating Point; 32 KB/32 KB L1 Cache, 1 MB L2 Cache |
| Real-Time Processing Unit | Dual-core Arm Cortex-R5 with CoreSight; Single/Double Precision Floating Point; 32 KB/32 KB L1 Cache, and TCM |
| Embedded and External Memory |
256 KB On-Chip Memory w/ECC; External DDR4; DDR3; DDR3L; LPDDR4; LPDDR3; External Quad-SPI; NAND; eMMC |
| General Connectivity | 214 PS I/O; UART; CAN; USB 2.0; I2C; SPI; 32b GPIO; Real Time Clock; WatchDog Timers; Triple Timer Counters |
| High-Speed Connectivity | 4 PS-GTR; PCIe Gen1/2; Serial ATA 3.1; DisplayPort™ 1.2a; USB 3.0; SGMII |
| Graphic Processing Unit | Arm Mali™-400 MP2; 64 KB L2 Cache |
Programmable Logic (PL)
| ZU1EG | ZU2EG | ZU3EG |
ZU3TEG | ZU4EV | ZU5EV | ZU7EV | ZU11EG |
|
|---|---|---|---|---|---|---|---|---|
| System Logic Cells (K) | 82 | 103 | 154 | 157 | 192 | 256 | 504 | 653 |
| Memory (Mb) | 3.8 | 5.3 | 7.6 | 19.1 | 18.5 | 23.1 | 38.0 | 43.6 |
| DSP Slices | 216 | 240 | 360 | 576 | 728 | 1,248 | 1,728 | 2,928 |
| Video Code Unit (VCU) | 1 | 1 | 1 | |||||
| Maximum I/O Pins | 252 | 252 | 252 | 124 | 252 | 252 | 204 | 464 |
Note: Some restrictions may apply. Refer to UG585, Zynq 7000 SoC Technical Reference Manual and DS188, Zynq 7000 XA SoC Overview for details.
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