AMD Zynq 7000 SoC ZC706 Evaluation Kit
by: AMD
The Zynq™ 7000 SoC ZC706 Evaluation Kit includes all the basic components of hardware, design tools, IP etc.
Overview
This board is currently not available.
Please consider the PicoZed as an alternative.
Product Description
The Zynq™ 7000 SoC ZC706 Evaluation Kit includes all the basic components of hardware, design tools, IP, and pre-verified reference designs including a targeted design, enabling a complete embedded processing platform and transceiver based designs including PCIe. The included pre-verified reference designs and industry-standard FPGA Mezzanine Connectors (FMC) allow scaling and customization with daughter cards. Please check the PetaLinux Software Development Kit page for information on the AMD processing systems.
Key Features & Benefits
- Optimized for quickly prototyping embedded applications using Zynq 7000 SoCs
- Hardware, design tools, IP, and pre-verified reference designs
- Demonstrates a embedded design, targeting video pipeline
- Advanced memory interface with
- 1GB DDR3 Component Memory
- 1GB DDR3 SODIM Memory
- Enabling serial connectivity with PCIe Gen2x4, SFP+ and SMA Pairs, USB OTG, UART, IIC
- Supports embedded processing with Dual ARM Cortex-A9 core processors
- Develop networking applications with 10-100-1000 Mbps Ethernet (RGMII)
- Implement Video display applications with HDMI out
- Expand I/O with the FPGA Mezzanine Card (FMC) interface
Featured AMD Devices
Featuring the ROHS compliant ZC706 including the XC7Z045 FFG900 – 2 SoC
| Logic Cells | 350 |
|---|---|
| Block RAM (Mb) | 19.1 |
| DSP Slices | 900 |
| Maximum I/O Pins | 362 |
| Maximum Transceiver Count | 16 |
Product Information
Board Features
Featuring the ZC706 Evaluation Board
Communication & Networking
- PCIe Gen2x4
- SFP+ and SMA Pairs
- GigE RGMII Ethernet (PS)
- USB OTG 1 (PS) - Host USB
- IIC Bus Headers/HUB (PS)
- 1 CAN with Wake on CAN (PS)
- USB UART (PS)
Expansion Connectors
- 1st FMC LPC expansion port (34 LVDS Pairs on LA Bus, 1 GT)
- 2nd FMC HPC expansion port (34 LVDS Pairs on LA Bus, 8 GT – No HA or HB bus)
- Dual Pmod (8 I/O Shared with LED’s)
- Single Pmod (4 I/O)
- IIC access to 8 I/O
Control & I/O
- 2 User Push Buttons/Dip Switch, 2 User LEDs
- IIC access to GPIO
- SDIO (SD Card slot)
- 3 User Push Buttons, 2 User Switches, 8 User LEDs
- IIC access to 8 I/O
- IIC access to a WTClock
Clocking
- 33MHz PS System Clock
- 200MHz PL Oscillator (Single-Ended Differential)
- SMA Connectors for external clock (Differential)
- GTX Reference Clock port with 2 SMA connectors
- OBSAI/CPRI – SFP+ Received clock
- EXT Config CLK
Configuration
- Onboard configuration circuitry
- 2X16MB Quad SPI Flash
- SDIO Card Interface (boot)
- PC4 and 20 pin JTAG ports
Memory
- DDR3 Component Memory 1GB (PS)
- DDR3 SODIM Memory 1GB (PL)
- 2X16MB Quad SPI Flash (config)
- IIC - 1 KB EEPROM
Analog
- AMS interface (Analog) System Monitor and also available for external sensor
Power
- 12 V wall adaptor
- Current measurement capability of supplies
What's Inside
ZC706 Evaluation Board
Featuring the XC7Z045 FFG900 -2 SoC
Full seat Vivado™ Design Suite: Design Edition
Node locked & Device-locked to the Zynq 7000 XC7Z045 SoC, with 1 year of updates
Ethernet Cable
ATX PCIe Minifit Jr Power Adapter
USB Adapter
USB Mini Cable
HDMI Cable
USB Micro Cable
Power Cord and Adapter
Resources
Design Tools & Downloads
| Name | Description | License Type | Files |
|---|---|---|---|
| Vivado Design Suite | The AMD Vivado™ Design Suite is a revolutionary IP and System Centric design environment built from the ground up to accelerate the design for FPGAs and SoCs. | Node locked and device-locked to the XCZU7EV MPSoC FPGA, with one year of updates | Download Vivado Design Suite |
| Vitis Unified Software Platform | Full suite of tools for embedded software development, hardware acceleration, and debug targeting AMD platforms. | Free | Download Vitis Embedded Platforms |
| PetaLinux Tools | Configure, Build, and Deploy Linux operating system to AMD platforms. | Free | Download Petalinux Tools |
Additional Tools, IP and Resources
| Name | Product Category | Item | Description |
|---|---|---|---|
| Deep Learning HDL Toolbox | Support Package | MathWorks | Enables deployment of deep learning processors on AMD FPGAs and SOCs using MATLAB |
| Getting Started Guide for Deep Learning HDL Toolbox | Training |
MathWorks | Learn how to create, compile, and deploy a dlhdl.workflow object using Deep Learning HDL Toolbox™ Support Package. |