New Class of Adaptive SoCs

Versal™ adaptive SoC integrates capabilities that far exceed those of conventional CPUs, GPUs, and FPGAs, enabling adaptive, domain specific architectures to accelerate whole applications

An Architecture Ahead

Surpassing the limits of Moore’s Law and traditional FPGA architectures, Versal adaptive SoC uniquely delivers unprecedented hard IP integration and SW programmable silicon infrastructure

System Level Performance & Integration

Key innovations deliver unparalleled application and system-level value for cloud, network, and edge applications at the forefront of their markets

System-Level Benefits of the Versal Platform

This white paper provides both a qualitative and quantitative analysis of Versal adaptive SoC system-level capabilities for a host of markets ranging from cloud to wired networking and 5G wireless infrastructure.

Learn how the Versal architecture delivers world-class performance/watt leadership over competing 10 nm FPGA architectures in end-applications such as AI compute accelerator, 5G Massive MIMO, network accelerator, smart SSDs, and multi-terabit SmartPHY—supported with data that can be validated with public tools.

Versal Benefits white paper cover

Portfolio

Adaptive SoC for any Application from Cloud to Edge

AI Edge Series

Delivers outstanding AI performance/watt for power- and thermally-constrained edge applications, accelerating preprocessing and AI inference.

Prime Series

The foundational Versal adaptive SoC series, providing a wide range of devices with broad applicability across multiple markets.

Premium Series

Breakthrough integration of networked, power-optimized cores on an adaptable platform for the most challenging compute and networking applications.

AI Core Series

Delivers breakthrough AI inference and wireless acceleration with AI Engines that deliver over 100X greater compute performance than today’s server-class CPUs.

HBM Series

Features hyper integration of fast memory, secure data, and adaptive compute for memory bound, compute intensive, high bandwidth applications.

An Architecture Ahead

Versal noc pipes

SW Programmable Silicon Infrastructure

Adaptive SoCs have been built from the ground-up to be natively software programmable without needing to know RTL (register-transfer level) languages or FPGA architectures. The platform is readily accessible to software developers and data scientists using their preferred tool flows, while providing an accelerated development path for hardware designers.

Key to the platform’s ease of programming is the integrated shell – consisting of a platform management controller, hardened host interface (integrated PCIe® w/DMA), memory controllers, and network interfaces interconnected with a multi-terabit, memory mapped programmable network on chip (NoC) for massive data flow and instant connectivity to compute and network infrastructure. The integrated shell delivers pre-engineered timing closure and logic resource savings so developers can focus on their key differentiation.

Unprecedented Integration of Hardened, Domain-Specific IP

With 3X more hardened IP than competing 10nm FPGAs, Versal adaptive SoCs feature a common hardened infrastructure across all devices for ease of programming and code portability, as well as domain-specific hardened IP for diverse markets.

The balance of adaptable hardware and hardened cores delivers performance/watt leadership for leading applications in cloud, network, and edge, all while retaining hardware flexibility to adapt to changing requirements and market dynamics.

Try Yourself

Run Benchmarks of Versal Adaptive SoC vs Competing FPGAs as Cited in White Paper

System-Level Power Benchmarks

Access Xilinx Power Estimator (XPE) scripts to run end-application power comparisons referenced in the white paper using XPE 2021.2 and Quartus power & calculator (PTC) 2021.2.

*Registration requests will be qualified

Resources

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