Alveo U25N
(2x 10G/25G)
Cost-effective, turnkey network acceleration for Open vSwitch (OVS), IPsec, firewall, QoS, and more.
Offloading work from the CPU to drive greater performance and efficiency
AMD solutions help accelerate infrastructure tasks in modern data centers, freeing up CPU cycles to perform high-value, business-critical functions.
With familiar FPGA development flows and comprehensive IP and reference designs, Alveo™ SmartNICs and network accelerators enable customizable datapaths to meet the diverse needs of hyperscalers, cloud service providers, telco operators, and enterprise data centers.
The Vivado™ Design Suite offers hardware developers a design environment and methodology for Alveo SmartNICs and network accelerators, including RTL programming, GUI-based IP integration, and a cohesive verification and implementation environment. A complete open-source NIC design (OpenNIC) is also available to simplify FPGA development of inline networking applications—featuring pre-built ethernet or QDMA subsystems, DPDK Linux® drivers, and AXI-based connectivity for ease of integration into custom IP.
With the widespread adoption of high-speed storage and the increased performance requirements of data-intensive applications, traditional architectures have created CPU, memory, and storage bottlenecks.
AMD FPGAs power computational storage devices that help move information processing closer to where the data resides. This helps reduce system-level bottlenecks, increase parallelism, and reduce overall power requirements.
Learn how Versal Premium Series Gen 2 devices are ideal for a wide range of storage applications in the data center including custom enterprise SSD’s, encryption/compression accelerators, memory pooling, and live migration.
The Vivado Design Suite offers hardware developers a design environment and methodology for customizing AMD FPGAs, including RTL programming, GUI-based IP integration, and a cohesive verification and implementation environment.
Contact an AMD Sales representative.