Overview
Product Description
The Virtex™ UltraScale™ FPGA VCU108 Evaluation Kit is the perfect development environment for evaluating the unprecedented levels of performance, system integration and bandwidth provided by Virtex UltraScale devices.
This kit provides an ideal platform for prototyping systems that require massive data flow and packet processing such as 400+ Gbps systems, large-scale emulation and high performance computing.
Key Features & Benefits
- 4 MB RLD3 Component Memory Interface
- Two 2.5 GB DDR4 Component Memory Interfaces
- 4 x 28 Gbps CFP2 & QSFP28 Optical Interfaces
- PCIe Gen3 x8
- 2x FPGA Mezzanine Card (FMC) interface for I/O expansion
Featured AMD Devices
Featuring the ROHS compliant VCU108 kit including the XCVU095-2FFVA2104E FPGA
| System Logic Cells (K) | 1,176 |
|---|---|
| DSP Slices | 768 |
| Memory (Mb) |
60.8 |
| GTH 16.3 Gb/s Transceivers | 32 |
| GTY 30.5 Gb/s Transceivers | 32 |
| I/O Pins | 832 |
Product Information
Board Features
Featuring the VCU108 Base Board
Configuration
- Onboard JTAG configuration circuitry to enable configuration over USB
- JTAG header provided for use with AMD download cables such as the Platform Cable USB II
- 1 Gb Linear x16 BPI flash memory
Memory
- Two 4 GB DDR4 component memory interfaces (five [256 Mb x 16] devices each)
- 4 MB RLD3 component memory interfaces (five [256 Mb x 16] devices each)IIC EEPROM: 8Kb
- Micro Secure Digital (SD) connector
Communication & Networking
- 4 x 28Gbps CFP2 cage
- 4 x 28Gbps QSPF28 cage
- GTY port(4 TX & RX) with pads for Samtec Bullseye Cable
- Dual USB-to-UART Bridge with mico-B USB connector
- PCI Express endpoint Gen3 x 8
- 10/100/1000 Mbps Ethernet (SGMII)
Expansion Connectors
- FMC HPC0 connector (ten GTH transceivers)
- FMC HPC1 connector (ten GTH transceivers)
- PMOD (1x6 0.1" Header)
Power
- AC Power adapter (12V) or ATX
Clocking
- SI5335A Quad Clock Generator
- Si570 IIC Programmable LVDS Clock Generator
- SI5328C Clock Multiplier and Jitter Attenuator
- Subminiature version A (SMA) connectors (differential)
Analog
- XADC header Power management with PMBus voltage monitoring through Maxim power controllers and GUI, current monitoring via FPGA SYSMON GUI
Control & I/O
- User Push Buttons (x5)
- User DIP Switch (4-position)
- SMA User I/O (Diff Pair)
Display
- HDMI video output
- User & Status LEDs
What's Inside
VCU108 Evaluation board featuring the Virtex UltraScale XCVU095-2FFVA2104E FPGA
PCIe loopback boards
FMC loopback boards
SMA Cables and adapters
QSFP loopback module
Resources
Design Tools
| Name | Description | License Type |
|---|---|---|
| Vivado Design Suite: Design Edition | The AMD Vivado™ Design Suite is a revolutionary IP and System Centric design environment built from the ground up to accelerate the design for FPGAs and SoCs. | Node locked & device-locked to the Kintex UltraScale KU040 FPGA, with 1 year of updates |
Intellectual Property
| Name | Description | License Type |
|---|---|---|
| Memory Interface Generator (MIG) | MIG is a free software tool used to generate memory controllers and interfaces for AMD FPGAs | No-Charge IP |
Additional Tools, IP and Resources
| Name | Description | Product Category | Provider |
|---|---|---|---|
| TeraTerm | One of many possible terminal emulators used for serial connection from your PC to the evaluation kit. | Software Tool | Open Source |
