Power estimation is critical for many decisions during the adaptive SoC and FPGA design process—from device selection to system-level power budgeting and thermal design. For many years, Xilinx Power Estimator (XPE) has been a leading FPGA power estimation tool. As adaptive SoCs and FPGAs increase in size and complexity, power estimation capabilities must scale accordingly, especially as designs include increasing numbers of new, complex, hard IP blocks.
Power Design Manager (PDM) is the next-generation power estimation platform designed to bring accurate and consistent power estimation capabilities to AMD Versal™, UltraScale+™ devices and Kria™ SOM products. PDM is the preferred power estimation tool for AMD adaptive SoCs and FPGAs, and AMD strongly recommends that all Versal designs use PDM going forward.
Easy Migration from XPE to PDM
Beginning with the 2023.1 release, Power Design Manager (PDM) is the only supported tool for evaluating the power consumption of Versal devices. PDM is the most advanced AMD power estimation tool, offering seamless migration of AMD adaptive SoCs and FPGAs from XPE to PDM. Simply select the Import XPE File option when creating a project in PDM. All XPE project data, including resource usage and toggle rates, are migrated directly into the PDM project.
Download PDM for power estimation of Versal and UltraScale+ devices.
XPE will continue to support all product families prior to the Versal portfolio.
Product | Power Design Manager (PDM) | Xilinx Power Estimator (XPE) |
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Kria SOMs Portfolio | ||
Kria K24 SOM | ![]() |
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Kria K26 SOM | ![]() |
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Kria KV260 Vision AI Starter Kit | ![]() |
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Kria KR260 Robotics Starter Kit | ![]() |
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Kria KD240 Drives Starter Kit | ![]() |
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Versal Portfolio | ||
Versal AI Edge Series | ![]() |
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Versal AI Core Series | ![]() |
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Versal Prime Series | ![]() |
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Versal Premium Series | ![]() |
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Versal HBM Series | ![]() |
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UltraScale+ Portfolio | ||
Artix™ UltraScale+ FPGA | ![]() |
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Kintex™ UltraScale+ FPGA | ![]() |
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Virtex™ UltraScale+ FPGA | ![]() |
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Zynq™ UltraScale+ MPSoC | ![]() |
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Zynq™ UltraScale+ RFSoC | ![]() |
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UltraScale™ Portfolio | ||
Virtex UltraScale FPGA | ![]() |
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Kintex UltraScale FPGA | ![]() |
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FPGA Portfolio | ||
Virtex FPGA | ![]() |
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Kintex FPGA | ![]() |
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Artix FPGA | ![]() |
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Spartan™ FPGA | ![]() |
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Zynq SoC | ![]() |
Power Design Manager for UltraScale+, Versal, and Kria SOM devices
PDM supports the AMD 16 nm devices from the UltraScale+™ porfolio.
See the latest PDM revision history Answer Record here Rev History AR.
Download PDM and access other resources
Power Design Manager (PDM) version 2024.1 is a standalone download for these products:
Use the latest version of PDM to ensure power data is the most accurate and up to date.
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