Product Description
The LogiCORE™ System Cache IP core provides system level caching capability to an AMBA® AXI4 system. The System Cache core resides in front of the external memory controller and is seen as a Level 2 cache from the MicroBlaze™ I and D caches. It can also be used to connect fabric accelerators to the UltraScale+ MPSoC ACE port.
Key Features and Benefits
- Dedicated AXI4 slave ports for MicroBlaze
- Connects up to 16 MicroBlaze processor cache ports, normally eight processors.
- Up to 16 generic AXI4 slave ports for other AXI4 masters
- Optional cache coherency on dedicated MicroBlaze processor ports with AXI Coherency Extension (ACE)
- Optional support for exclusive access with non-coherent configuration
- Optional cache coherency on master port for Zynq UltraScale+ MPSoC connection
- Optional support for Non-Secure transactions
- Optional support for AXI error handling
- AXI4 master port connecting the external memory controller
- Highly configurable cache—2 or 4 set associative cache of up to 4 MB in size
- Optional AXI4-Lite Statistics and Control port
- Supports up to 64 bit AXI4 address width
Resource Utilization
Support
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