Vivado IP Release Notes
This article contains a list of all 'Vivado™ IP Release Notes - All IP Change Log Information' answer records and the associated Vivado Tools release.
by: AMD
The Block Memory Generator LogiCORE™ IP core automates the creation of resource and power optimized block memories for AMD FPGAs.
AMD provides a flexible Block Memory Generator core to create compact, high-performance memories running at up to 450 MHz.
The Block Memory Generator LogiCORE™ IP core automates the creation of resource and power optimized block memories for AMD FPGAs. Available through the ISE™ Design Suite CORE Generator™ System, the core enables users to create block memory functions to suit a variety of requirements. Built-in knowledge about AMD device architectures allow it to leverage specialized FPGA architectural features to create the most compact, high performance or low power solution.
A Migration Kit is available to automate the migration to latest version of the core.
Certain AMD technologies may require third-party enablement or activation. Supported features may vary by operating system. Please confirm with system manufacturer for specific features. No technology or product can be completely secure.