Vector MAC with partial pre-adding

Overview

Vector MAC operations allowing pre-addition from within the X buffer, or between the X and Y buffers. The data for the final column for each lane can be selected seperately and without pre-adding for additional flexibility. The result is then multiplied with data from the Z buffer.

For general information on all vector MAC intrinsics go here.

Modules
	16 bit x 16 bit
	16 bit x 32 bit
	32 bit x 16 bit
	32 bit x 32 bit