Here is a list of all modules:

[detail level 12345678910]

Data Types	Summary of the vector and accumulator registers
Scalar Data types	All the standard C scalar data types are supported
Vector Data types
Accumulator Types
320/384 bits Accumulator
640/768 bits Double Accumulator
Floating Point Accumulator Types
Floating Point Vector Types
Integer Vector Types
1024 bits Vectors
128 bits Vectors
256 bits Vectors
512 bits Vectors
Intrinsics
Application Specific Intrinsics
Digital Pre-Distortion
Direct Digital Synthesis (DDS) Interpolation
FFT intrinsics
Peak Cancellation Crest Factor Reduction (PC-CFR)
Load/Store Operations
Streams
Scalar Operations
AIE ID
Addressing Operations
Cyclic Addressing
FFT Addressing
Cycle Counter
Datatype Conversions	Support for converting floating-point numbers to fixed-point and fixed-point numbers to floating-point
Delayed Scalar Moves	Intrinsic that returns its input after 6 clock cycles. Used for scheduling optimization
Elementary Functions
Events
Integer Operations
AIE ID
Digital Pre-Distortion
Peak Cancellation Crest Factor Reduction (PC-CFR)
Locks
Vector Conversions	Various forms of conversions between vector data types
Casting	Casting intrinsics allow casting between vector types of the same size
Concatenations	Vector concat intrinsic functions allow creating a bigger vector from two or four smaller ones
Datatype Conversions	Support for converting floating-point vectors to fixed-point vectors and fixed-point vectors to floating-point vectors
Extract	Extraction intrinsics enable lanes to be selected from vector and accumulator types
Moves between Scalar and Vector Unit	These intrinsics allow inserting or extracting of an individual element into/from a vector
Pack
Sets	Vector set intrinsic functions allow creating a vector where only one part is intitialized and the other parts are undefined
Shift-Round-Saturate	Intrinsics for moving values from accumulator data-types to vector data-types
Updates	Vector update intrinsic functions allow substitution of the lanes within a vector value
Updates with memory load
Upshift	Intrinsics for moving values from vector data types to accumulator data types
Vector Operations
Configuration
Mode Settings	Mode setting intrinsics to get and set bits in the control and status register
Control register	Intrinsics to set, get and clear bits of the control register
Status register	Intrinsics to set, get and clear bits of the status register
Full Lane Addresssing Scheme
Initialization
MAC intrinsics
Multiplication
Advanced
Float
Integer
Vector MAC
16 bit x 16 bit
16 bit Complex x 16 bit Complex
Dynamic X and Z buffer conjugation
No conjugation
X and Z buffer conjugation
X buffer conjugation
Z buffer conjugation
16 bit Complex x 16 bit Real
Dynamic X buffer conjugation
No conjugation
X buffer conjugation
16 bit Real x 16 bit Complex
Dynamic Z buffer conjugation
No conjugation
Z buffer conjugation
16 bit Real x 16 bit Real
16 bit x 32 bit
16 bit Complex x 32 bit Complex
Dynamic X and Z buffer conjugation
No conjugation
X and Z buffer conjugation
X buffer conjugation
Z buffer conjugation
16 bit Complex x 32 bit Real
Dynamic X buffer conjugation
No conjugation
X buffer conjugation
16 bit Real x 32 bit Complex
Dynamic Z buffer conjugation
No conjugation
Z buffer conjugation
16 bit Real x 32 bit Real
16 bit x 8 bit
16 bit Real x 8 bit Real
32 bit x 16 bit
32 bit Complex x 16 bit Complex
Dynamic X and Z buffer conjugation
No conjugation
X and Z buffer conjugation
X buffer conjugation
Z buffer conjugation
32 bit Complex x 16 bit Real
Dynamic X buffer conjugation
No conjugation
X buffer conjugation
32 bit Real x 16 bit Complex
Dynamic Z buffer conjugation
No conjugation
Z buffer conjugation
32 bit Real x 16 bit Real
32 bit x 32 bit
32 bit Complex x 32 bit Complex
Dynamic X and Z buffer conjugation
No conjugation
X and Z buffer conjugation
X buffer conjugation
Z buffer conjugation
32 bit Complex x 32 bit Real
Dynamic X buffer conjugation
No conjugation
X buffer conjugation
32 bit Real x 32 bit Complex
Dynamic Z buffer conjugation
No conjugation
Z buffer conjugation
32 bit Real x 32 bit Real
8 bit x 8 bit
8 bit Real x 8 bit Real
Vector MAC combined with vector comparisons
16 bit x 16 bit
16 bit Real x 16 bit Complex
Dynamic Z buffer conjugation
No conjugation
Z buffer conjugation
16 bit Real x 16 bit Real
16 bit x 32 bit
16 bit Real x 32 bit Complex
Dynamic Z buffer conjugation
No conjugation
Z buffer conjugation
16 bit Real x 32 bit Real
32 bit x 16 bit
32 bit Real x 16 bit Complex
Dynamic Z buffer conjugation
No conjugation
Z buffer conjugation
32 bit Real x 16 bit Real
32 bit x 32 bit
32 bit Real x 32 bit Complex
Dynamic Z buffer conjugation
No conjugation
Z buffer conjugation
32 bit Real x 32 bit Real
Vector MAC with partial pre-adding
16 bit x 16 bit
16 bit Complex x 16 bit Complex
Dynamic X and Z buffer conjugation
No conjugation
X and Z buffer conjugation
X buffer conjugation
Z buffer conjugation
16 bit Complex x 16 bit Real
Dynamic X buffer conjugation
No conjugation
X buffer conjugation
16 bit Real x 16 bit Complex
Dynamic Z buffer conjugation
No conjugation
Z buffer conjugation
16 bit x 32 bit
16 bit Complex x 32 bit Real
Dynamic X buffer conjugation
No conjugation
X buffer conjugation
16 bit Real x 32 bit Complex
Dynamic Z buffer conjugation
No conjugation
Z buffer conjugation
16 bit Real x 32 bit Real
32 bit x 16 bit
32 bit Complex x 16 bit Real
Dynamic X buffer conjugation
No conjugation
X buffer conjugation
32 bit Real x 16 bit Complex
Dynamic Z buffer conjugation
No conjugation
Z buffer conjugation
32 bit Real x 16 bit Real
32 bit x 32 bit
32 bit Complex x 32 bit Real
Dynamic X buffer conjugation
No conjugation
X buffer conjugation
32 bit Real x 32 bit Complex
Dynamic Z buffer conjugation
No conjugation
Z buffer conjugation
32 bit Real x 32 bit Real
Vector MAC with partial pre-subtraction
16 bit x 16 bit
16 bit Complex x 16 bit Complex
Dynamic X and Z buffer conjugation
No conjugation
X and Z buffer conjugation
X buffer conjugation
Z buffer conjugation
16 bit Complex x 16 bit Real
Dynamic X buffer conjugation
No conjugation
X buffer conjugation
16 bit Real x 16 bit Complex
Dynamic Z buffer conjugation
No conjugation
Z buffer conjugation
16 bit x 32 bit
16 bit Complex x 32 bit Real
Dynamic X buffer conjugation
No conjugation
X buffer conjugation
16 bit Real x 32 bit Complex
Dynamic Z buffer conjugation
No conjugation
Z buffer conjugation
16 bit Real x 32 bit Real
32 bit x 16 bit
32 bit Complex x 16 bit Real
Dynamic X buffer conjugation
No conjugation
X buffer conjugation
32 bit Real x 16 bit Complex
Dynamic Z buffer conjugation
No conjugation
Z buffer conjugation
32 bit Real x 16 bit Real
32 bit x 32 bit
32 bit Complex x 32 bit Real
Dynamic X buffer conjugation
No conjugation
X buffer conjugation
32 bit Real x 32 bit Complex
Dynamic Z buffer conjugation
No conjugation
Z buffer conjugation
32 bit Real x 32 bit Real
Vector MAC with pre-adding
16 bit x 16 bit
16 bit Complex x 16 bit Complex
Dynamic X and Z buffer conjugation
No conjugation
X and Z buffer conjugation
X buffer conjugation
Z buffer conjugation
16 bit Complex x 16 bit Real
Dynamic X buffer conjugation
No conjugation
X buffer conjugation
16 bit Real x 16 bit Complex
Dynamic Z buffer conjugation
No conjugation
Z buffer conjugation
16 bit Real x 16 bit Real
16 bit x 32 bit
16 bit Complex x 32 bit Complex
Dynamic X and Z buffer conjugation
No conjugation
X and Z buffer conjugation
X buffer conjugation
Z buffer conjugation
16 bit Complex x 32 bit Real
Dynamic X buffer conjugation
No conjugation
X buffer conjugation
16 bit Real x 32 bit Complex
Dynamic Z buffer conjugation
No conjugation
Z buffer conjugation
16 bit Real x 32 bit Real
32 bit x 16 bit
32 bit Complex x 16 bit Complex
Dynamic X and Z buffer conjugation
No conjugation
X and Z buffer conjugation
X buffer conjugation
Z buffer conjugation
32 bit Complex x 16 bit Real
Dynamic X buffer conjugation
No conjugation
X buffer conjugation
32 bit Real x 16 bit Complex
Dynamic Z buffer conjugation
No conjugation
Z buffer conjugation
32 bit Real x 16 bit Real
32 bit x 32 bit
32 bit Complex x 32 bit Complex
Dynamic X and Z buffer conjugation
No conjugation
X and Z buffer conjugation
X buffer conjugation
Z buffer conjugation
32 bit Complex x 32 bit Real
Dynamic X buffer conjugation
No conjugation
X buffer conjugation
32 bit Real x 32 bit Complex
Dynamic Z buffer conjugation
No conjugation
Z buffer conjugation
32 bit Real x 32 bit Real
Vector MAC with pre-adding and conjugation
32 bit x 16 bit
32 bit Complex x 16 bit Complex
Dynamic X and Z buffer conjugation
No conjugation
X and Z buffer conjugation
X buffer conjugation
Z buffer conjugation
Vector MAC with pre-adding and upshifting
16 bit x 16 bit
16 bit Complex x 16 bit Complex
Dynamic X and Z buffer conjugation
No conjugation
X and Z buffer conjugation
X buffer conjugation
Z buffer conjugation
16 bit Complex x 16 bit Real
Dynamic X buffer conjugation
No conjugation
X buffer conjugation
16 bit Real x 16 bit Real
16 bit x 32 bit
16 bit Complex x 32 bit Complex
Dynamic X and Z buffer conjugation
No conjugation
X and Z buffer conjugation
X buffer conjugation
Z buffer conjugation
16 bit Complex x 32 bit Real
Dynamic X buffer conjugation
No conjugation
X buffer conjugation
16 bit Real x 32 bit Real
Vector MAC with pre-subtraction
16 bit x 16 bit
16 bit Complex x 16 bit Complex
Dynamic X and Z buffer conjugation
No conjugation
X and Z buffer conjugation
X buffer conjugation
Z buffer conjugation
16 bit Complex x 16 bit Real
Dynamic X buffer conjugation
No conjugation
X buffer conjugation
16 bit Real x 16 bit Complex
Dynamic Z buffer conjugation
No conjugation
Z buffer conjugation
16 bit Real x 16 bit Real
16 bit x 32 bit
16 bit Complex x 32 bit Complex
Dynamic X and Z buffer conjugation
No conjugation
X and Z buffer conjugation
X buffer conjugation
Z buffer conjugation
16 bit Complex x 32 bit Real
Dynamic X buffer conjugation
No conjugation
X buffer conjugation
16 bit Real x 32 bit Complex
Dynamic Z buffer conjugation
No conjugation
Z buffer conjugation
16 bit Real x 32 bit Real
32 bit x 16 bit
32 bit Complex x 16 bit Complex
Dynamic X and Z buffer conjugation
No conjugation
X and Z buffer conjugation
X buffer conjugation
Z buffer conjugation
32 bit Complex x 16 bit Real
Dynamic X buffer conjugation
No conjugation
X buffer conjugation
32 bit Real x 16 bit Complex
Dynamic Z buffer conjugation
No conjugation
Z buffer conjugation
32 bit Real x 16 bit Real
32 bit x 32 bit
32 bit Complex x 32 bit Complex
Dynamic X and Z buffer conjugation
No conjugation
X and Z buffer conjugation
X buffer conjugation
Z buffer conjugation
32 bit Complex x 32 bit Real
Dynamic X buffer conjugation
No conjugation
X buffer conjugation
32 bit Real x 32 bit Complex
Dynamic Z buffer conjugation
No conjugation
Z buffer conjugation
32 bit Real x 32 bit Real
Vector MAC with pre-subtraction and conjugation
32 bit x 16 bit
32 bit Complex x 16 bit Complex
Dynamic X and Z buffer conjugation
No conjugation
X and Z buffer conjugation
X buffer conjugation
Z buffer conjugation
Vector MAC with pre-subtraction and upshifting
16 bit x 16 bit
16 bit Complex x 16 bit Complex
Dynamic X and Z buffer conjugation
No conjugation
X and Z buffer conjugation
X buffer conjugation
Z buffer conjugation
16 bit Complex x 16 bit Real
Dynamic X buffer conjugation
No conjugation
X buffer conjugation
16 bit Real x 16 bit Real
16 bit x 32 bit
16 bit Complex x 32 bit Complex
Dynamic X and Z buffer conjugation
No conjugation
X and Z buffer conjugation
X buffer conjugation
Z buffer conjugation
16 bit Complex x 32 bit Real
Dynamic X buffer conjugation
No conjugation
X buffer conjugation
16 bit Real x 32 bit Real
Simple
Self-Multiplication
Advanced
16 bit x 16 bit
16-bit Complex x 16-bit Complex
No buffer conjugation.
X and Y buffer conjugation.
X buffer conjugation.
Y buffer conjugation.
16-bit Real x 16-bit Real
32 bit x 32 bit
32-bit Complex x 32-bit Complex
No buffer conjugation.
X and Y buffer conjugation.
X buffer conjugation.
Y buffer conjugation.
32-bit Real x 32-bit Real
Simple
Reduced Lane Addressing Scheme
Vector Arithmetic
Advanced
Float
Integer
Simple
Vector Compares
Advanced
Vector Max/Min
Float
Integer
Vector MaxDiff
Vector comparison
Float
Integer
Simple	Lane by lane vector compare
Vector Lane Selection
Advanced
Float
Integer
Simple
Float
Integer