AI Engine Intrinsics User Guide
(AIE) v(2024.1)
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Vector MAC operations allowing pre-addition from within the X buffer, or between the X and Y buffers. The result is then multiplied with data from the Z buffer to generate four lanes. The next four lanes are a column of data seperately selected from the Y buffer which is upshifted.
For general information on all vector MAC intrinsics go here.
Modules | |
16 bit x 16 bit | |
16 bit x 32 bit | |