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AI Engine-ML Intrinsics User Guide (v2024.2)
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Matrix multiplications in which matrix A and matrix B have data elements of 8 bit. More...
Matrix multiplications in which matrix A and matrix B have data elements of 8 bit.
For an explanation how these operations works see Multiply Accumulate.
Multiplication of (4x8) with (8x8) with dynamic negation of multiplication result | |
v32acc32 | mul_4x8_8x8_conf (v64uint8 a, v64uint8 b, int sub_mul) |
v32acc32 | negmul_4x8_8x8_conf (v64uint8 a, v64uint8 b, int sub_mul) |
v32acc32 | mul_4x8_8x8_conf (v64uint8 a, v64int8 b, int sub_mul) |
v32acc32 | negmul_4x8_8x8_conf (v64uint8 a, v64int8 b, int sub_mul) |
v32acc32 | mul_4x8_8x8_conf (v64int8 a, v64uint8 b, int sub_mul) |
v32acc32 | negmul_4x8_8x8_conf (v64int8 a, v64uint8 b, int sub_mul) |
v32acc32 | mul_4x8_8x8_conf (v64int8 a, v64int8 b, int sub_mul) |
v32acc32 | negmul_4x8_8x8_conf (v64int8 a, v64int8 b, int sub_mul) |
Multiplication of (4x8) with (8x8) with dynamic negation of multiplication result, zeroing of acc1, and negation of acc1 | |
v32acc32 | mac_4x8_8x8_conf (v64uint8 a, v64uint8 b, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | msc_4x8_8x8_conf (v64uint8 a, v64uint8 b, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | negmsc_4x8_8x8_conf (v64uint8 a, v64uint8 b, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | negmac_4x8_8x8_conf (v64uint8 a, v64uint8 b, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | addmac_4x8_8x8_conf (v64uint8 a, v64uint8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | addmsc_4x8_8x8_conf (v64uint8 a, v64uint8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submac_4x8_8x8_conf (v64uint8 a, v64uint8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submsc_4x8_8x8_conf (v64uint8 a, v64uint8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | mac_4x8_8x8_conf (v64uint8 a, v64int8 b, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | msc_4x8_8x8_conf (v64uint8 a, v64int8 b, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | negmsc_4x8_8x8_conf (v64uint8 a, v64int8 b, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | negmac_4x8_8x8_conf (v64uint8 a, v64int8 b, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | addmac_4x8_8x8_conf (v64uint8 a, v64int8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | addmsc_4x8_8x8_conf (v64uint8 a, v64int8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submac_4x8_8x8_conf (v64uint8 a, v64int8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submsc_4x8_8x8_conf (v64uint8 a, v64int8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | mac_4x8_8x8_conf (v64int8 a, v64uint8 b, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | msc_4x8_8x8_conf (v64int8 a, v64uint8 b, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | negmsc_4x8_8x8_conf (v64int8 a, v64uint8 b, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | negmac_4x8_8x8_conf (v64int8 a, v64uint8 b, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | addmac_4x8_8x8_conf (v64int8 a, v64uint8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | addmsc_4x8_8x8_conf (v64int8 a, v64uint8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submac_4x8_8x8_conf (v64int8 a, v64uint8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submsc_4x8_8x8_conf (v64int8 a, v64uint8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | mac_4x8_8x8_conf (v64int8 a, v64int8 b, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | msc_4x8_8x8_conf (v64int8 a, v64int8 b, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | negmsc_4x8_8x8_conf (v64int8 a, v64int8 b, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | negmac_4x8_8x8_conf (v64int8 a, v64int8 b, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | addmac_4x8_8x8_conf (v64int8 a, v64int8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | addmsc_4x8_8x8_conf (v64int8 a, v64int8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submac_4x8_8x8_conf (v64int8 a, v64int8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submsc_4x8_8x8_conf (v64int8 a, v64int8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
Multiplication of (4x8) with (8x8) with dynamic sign and dynamic negation of multiplication result | |
v32acc32 | mul_4x8_8x8_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, int sub_mul) |
v32acc32 | negmul_4x8_8x8_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, int sub_mul) |
v32acc32 | mac_4x8_8x8_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | msc_4x8_8x8_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | negmsc_4x8_8x8_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | negmac_4x8_8x8_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | addmac_4x8_8x8_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | addmsc_4x8_8x8_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submac_4x8_8x8_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submsc_4x8_8x8_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | mul_4x8_8x8_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, int sub_mul) |
v32acc32 | negmul_4x8_8x8_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, int sub_mul) |
v32acc32 | mac_4x8_8x8_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | msc_4x8_8x8_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | negmsc_4x8_8x8_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | negmac_4x8_8x8_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | addmac_4x8_8x8_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | addmsc_4x8_8x8_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submac_4x8_8x8_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submsc_4x8_8x8_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | mul_4x8_8x8_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, int sub_mul) |
v32acc32 | negmul_4x8_8x8_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, int sub_mul) |
v32acc32 | mac_4x8_8x8_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | msc_4x8_8x8_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | negmsc_4x8_8x8_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | negmac_4x8_8x8_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | addmac_4x8_8x8_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | addmsc_4x8_8x8_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submac_4x8_8x8_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submsc_4x8_8x8_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | mul_4x8_8x8_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, int sub_mul) |
v32acc32 | negmul_4x8_8x8_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, int sub_mul) |
v32acc32 | mac_4x8_8x8_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | msc_4x8_8x8_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | negmsc_4x8_8x8_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | negmac_4x8_8x8_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | addmac_4x8_8x8_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | addmsc_4x8_8x8_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submac_4x8_8x8_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submsc_4x8_8x8_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
Channel by channel mutliplication of (1x2) with (2x1) with dynamic negation of multiplication result | |
v32acc32 | mul_elem_32_2_conf (v64uint8 a, v64uint8 b, int sub_mul) |
v32acc32 | negmul_elem_32_2_conf (v64uint8 a, v64uint8 b, int sub_mul) |
v32acc32 | mul_elem_32_2_conf (v64uint8 a, v64int8 b, int sub_mul) |
v32acc32 | negmul_elem_32_2_conf (v64uint8 a, v64int8 b, int sub_mul) |
v32acc32 | mul_elem_32_2_conf (v64int8 a, v64uint8 b, int sub_mul) |
v32acc32 | negmul_elem_32_2_conf (v64int8 a, v64uint8 b, int sub_mul) |
v32acc32 | mul_elem_32_2_conf (v64int8 a, v64int8 b, int sub_mul) |
v32acc32 | negmul_elem_32_2_conf (v64int8 a, v64int8 b, int sub_mul) |
Channel by channel mutliplication of (1x2) with (2x1) with dynamic negation of multiplication result, zeroing of acc1, and negation of acc1 | |
v32acc32 | mac_elem_32_2_conf (v64uint8 a, v64uint8 b, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | msc_elem_32_2_conf (v64uint8 a, v64uint8 b, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | negmsc_elem_32_2_conf (v64uint8 a, v64uint8 b, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | negmac_elem_32_2_conf (v64uint8 a, v64uint8 b, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | addmac_elem_32_2_conf (v64uint8 a, v64uint8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | addmsc_elem_32_2_conf (v64uint8 a, v64uint8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submac_elem_32_2_conf (v64uint8 a, v64uint8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submsc_elem_32_2_conf (v64uint8 a, v64uint8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | mac_elem_32_2_conf (v64uint8 a, v64int8 b, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | msc_elem_32_2_conf (v64uint8 a, v64int8 b, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | negmsc_elem_32_2_conf (v64uint8 a, v64int8 b, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | negmac_elem_32_2_conf (v64uint8 a, v64int8 b, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | addmac_elem_32_2_conf (v64uint8 a, v64int8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | addmsc_elem_32_2_conf (v64uint8 a, v64int8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submac_elem_32_2_conf (v64uint8 a, v64int8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submsc_elem_32_2_conf (v64uint8 a, v64int8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | mac_elem_32_2_conf (v64int8 a, v64uint8 b, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | msc_elem_32_2_conf (v64int8 a, v64uint8 b, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | negmsc_elem_32_2_conf (v64int8 a, v64uint8 b, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | negmac_elem_32_2_conf (v64int8 a, v64uint8 b, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | addmac_elem_32_2_conf (v64int8 a, v64uint8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | addmsc_elem_32_2_conf (v64int8 a, v64uint8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submac_elem_32_2_conf (v64int8 a, v64uint8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submsc_elem_32_2_conf (v64int8 a, v64uint8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | mac_elem_32_2_conf (v64int8 a, v64int8 b, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | msc_elem_32_2_conf (v64int8 a, v64int8 b, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | negmsc_elem_32_2_conf (v64int8 a, v64int8 b, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | negmac_elem_32_2_conf (v64int8 a, v64int8 b, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | addmac_elem_32_2_conf (v64int8 a, v64int8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | addmsc_elem_32_2_conf (v64int8 a, v64int8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submac_elem_32_2_conf (v64int8 a, v64int8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submsc_elem_32_2_conf (v64int8 a, v64int8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
Channel by channel mutliplication of (1x2) with (2x1) with dynamic sign and dynamic negation of multiplication result | |
v32acc32 | mul_elem_32_2_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, int sub_mul) |
v32acc32 | negmul_elem_32_2_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, int sub_mul) |
v32acc32 | mac_elem_32_2_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | msc_elem_32_2_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | negmsc_elem_32_2_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | negmac_elem_32_2_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | addmac_elem_32_2_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | addmsc_elem_32_2_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submac_elem_32_2_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submsc_elem_32_2_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | mul_elem_32_2_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, int sub_mul) |
v32acc32 | negmul_elem_32_2_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, int sub_mul) |
v32acc32 | mac_elem_32_2_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | msc_elem_32_2_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | negmsc_elem_32_2_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | negmac_elem_32_2_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | addmac_elem_32_2_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | addmsc_elem_32_2_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submac_elem_32_2_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submsc_elem_32_2_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | mul_elem_32_2_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, int sub_mul) |
v32acc32 | negmul_elem_32_2_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, int sub_mul) |
v32acc32 | mac_elem_32_2_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | msc_elem_32_2_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | negmsc_elem_32_2_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | negmac_elem_32_2_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | addmac_elem_32_2_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | addmsc_elem_32_2_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submac_elem_32_2_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submsc_elem_32_2_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | mul_elem_32_2_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, int sub_mul) |
v32acc32 | negmul_elem_32_2_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, int sub_mul) |
v32acc32 | mac_elem_32_2_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | msc_elem_32_2_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | negmsc_elem_32_2_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | negmac_elem_32_2_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | addmac_elem_32_2_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | addmsc_elem_32_2_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submac_elem_32_2_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submsc_elem_32_2_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
Convolution of (4x4) matrix with (4x1) kernel and 8 channels with dynamic negation of multiplication result | |
v32acc32 | mul_conv_4x4_8ch_conf (v64uint8 a, v64uint8 b, int sub_mul) |
v32acc32 | negmul_conv_4x4_8ch_conf (v64uint8 a, v64uint8 b, int sub_mul) |
v32acc32 | mul_conv_4x4_8ch_conf (v64uint8 a, v64int8 b, int sub_mul) |
v32acc32 | negmul_conv_4x4_8ch_conf (v64uint8 a, v64int8 b, int sub_mul) |
v32acc32 | mul_conv_4x4_8ch_conf (v64int8 a, v64uint8 b, int sub_mul) |
v32acc32 | negmul_conv_4x4_8ch_conf (v64int8 a, v64uint8 b, int sub_mul) |
v32acc32 | mul_conv_4x4_8ch_conf (v64int8 a, v64int8 b, int sub_mul) |
v32acc32 | negmul_conv_4x4_8ch_conf (v64int8 a, v64int8 b, int sub_mul) |
Convolution of (4x4) matrix with (4x1) kernel and 8 channels with dynamic negation of multiplication result, zeroing of acc1, and negation of acc1 | |
v32acc32 | mac_conv_4x4_8ch_conf (v64uint8 a, v64uint8 b, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | msc_conv_4x4_8ch_conf (v64uint8 a, v64uint8 b, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | negmsc_conv_4x4_8ch_conf (v64uint8 a, v64uint8 b, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | negmac_conv_4x4_8ch_conf (v64uint8 a, v64uint8 b, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | addmac_conv_4x4_8ch_conf (v64uint8 a, v64uint8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | addmsc_conv_4x4_8ch_conf (v64uint8 a, v64uint8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submac_conv_4x4_8ch_conf (v64uint8 a, v64uint8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submsc_conv_4x4_8ch_conf (v64uint8 a, v64uint8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | mac_conv_4x4_8ch_conf (v64uint8 a, v64int8 b, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | msc_conv_4x4_8ch_conf (v64uint8 a, v64int8 b, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | negmsc_conv_4x4_8ch_conf (v64uint8 a, v64int8 b, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | negmac_conv_4x4_8ch_conf (v64uint8 a, v64int8 b, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | addmac_conv_4x4_8ch_conf (v64uint8 a, v64int8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | addmsc_conv_4x4_8ch_conf (v64uint8 a, v64int8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submac_conv_4x4_8ch_conf (v64uint8 a, v64int8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submsc_conv_4x4_8ch_conf (v64uint8 a, v64int8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | mac_conv_4x4_8ch_conf (v64int8 a, v64uint8 b, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | msc_conv_4x4_8ch_conf (v64int8 a, v64uint8 b, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | negmsc_conv_4x4_8ch_conf (v64int8 a, v64uint8 b, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | negmac_conv_4x4_8ch_conf (v64int8 a, v64uint8 b, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | addmac_conv_4x4_8ch_conf (v64int8 a, v64uint8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | addmsc_conv_4x4_8ch_conf (v64int8 a, v64uint8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submac_conv_4x4_8ch_conf (v64int8 a, v64uint8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submsc_conv_4x4_8ch_conf (v64int8 a, v64uint8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | mac_conv_4x4_8ch_conf (v64int8 a, v64int8 b, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | msc_conv_4x4_8ch_conf (v64int8 a, v64int8 b, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | negmsc_conv_4x4_8ch_conf (v64int8 a, v64int8 b, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | negmac_conv_4x4_8ch_conf (v64int8 a, v64int8 b, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | addmac_conv_4x4_8ch_conf (v64int8 a, v64int8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | addmsc_conv_4x4_8ch_conf (v64int8 a, v64int8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submac_conv_4x4_8ch_conf (v64int8 a, v64int8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submsc_conv_4x4_8ch_conf (v64int8 a, v64int8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
Convolution of (4x4) matrix with (4x1) kernel and 8 channels with dynamic sign and dynamic negation of multiplication result | |
v32acc32 | mul_conv_4x4_8ch_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, int sub_mul) |
v32acc32 | negmul_conv_4x4_8ch_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, int sub_mul) |
v32acc32 | mac_conv_4x4_8ch_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | msc_conv_4x4_8ch_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | negmsc_conv_4x4_8ch_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | negmac_conv_4x4_8ch_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | addmac_conv_4x4_8ch_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | addmsc_conv_4x4_8ch_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submac_conv_4x4_8ch_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submsc_conv_4x4_8ch_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | mul_conv_4x4_8ch_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, int sub_mul) |
v32acc32 | negmul_conv_4x4_8ch_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, int sub_mul) |
v32acc32 | mac_conv_4x4_8ch_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | msc_conv_4x4_8ch_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | negmsc_conv_4x4_8ch_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | negmac_conv_4x4_8ch_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | addmac_conv_4x4_8ch_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | addmsc_conv_4x4_8ch_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submac_conv_4x4_8ch_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submsc_conv_4x4_8ch_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | mul_conv_4x4_8ch_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, int sub_mul) |
v32acc32 | negmul_conv_4x4_8ch_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, int sub_mul) |
v32acc32 | mac_conv_4x4_8ch_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | msc_conv_4x4_8ch_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | negmsc_conv_4x4_8ch_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | negmac_conv_4x4_8ch_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | addmac_conv_4x4_8ch_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | addmsc_conv_4x4_8ch_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submac_conv_4x4_8ch_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submsc_conv_4x4_8ch_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | mul_conv_4x4_8ch_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, int sub_mul) |
v32acc32 | negmul_conv_4x4_8ch_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, int sub_mul) |
v32acc32 | mac_conv_4x4_8ch_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | msc_conv_4x4_8ch_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | negmsc_conv_4x4_8ch_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | negmac_conv_4x4_8ch_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | addmac_conv_4x4_8ch_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | addmsc_conv_4x4_8ch_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submac_conv_4x4_8ch_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submsc_conv_4x4_8ch_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
Convolution of (8x8) matrix with (8x1) kernel and 4 channels with dynamic negation of multiplication result | |
v32acc32 | mul_conv_8x8_4ch_conf (v64uint8 a, v64uint8 b, int sub_mul) |
v32acc32 | negmul_conv_8x8_4ch_conf (v64uint8 a, v64uint8 b, int sub_mul) |
v32acc32 | mul_conv_8x8_4ch_conf (v64uint8 a, v64int8 b, int sub_mul) |
v32acc32 | negmul_conv_8x8_4ch_conf (v64uint8 a, v64int8 b, int sub_mul) |
v32acc32 | mul_conv_8x8_4ch_conf (v64int8 a, v64uint8 b, int sub_mul) |
v32acc32 | negmul_conv_8x8_4ch_conf (v64int8 a, v64uint8 b, int sub_mul) |
v32acc32 | mul_conv_8x8_4ch_conf (v64int8 a, v64int8 b, int sub_mul) |
v32acc32 | negmul_conv_8x8_4ch_conf (v64int8 a, v64int8 b, int sub_mul) |
Convolution of (8x8) matrix with (8x1) kernel and 4 channels with dynamic negation of multiplication result, zeroing of acc1, and negation of acc1 | |
v32acc32 | mac_conv_8x8_4ch_conf (v64uint8 a, v64uint8 b, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | msc_conv_8x8_4ch_conf (v64uint8 a, v64uint8 b, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | negmsc_conv_8x8_4ch_conf (v64uint8 a, v64uint8 b, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | negmac_conv_8x8_4ch_conf (v64uint8 a, v64uint8 b, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | addmac_conv_8x8_4ch_conf (v64uint8 a, v64uint8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | addmsc_conv_8x8_4ch_conf (v64uint8 a, v64uint8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submac_conv_8x8_4ch_conf (v64uint8 a, v64uint8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submsc_conv_8x8_4ch_conf (v64uint8 a, v64uint8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | mac_conv_8x8_4ch_conf (v64uint8 a, v64int8 b, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | msc_conv_8x8_4ch_conf (v64uint8 a, v64int8 b, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | negmsc_conv_8x8_4ch_conf (v64uint8 a, v64int8 b, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | negmac_conv_8x8_4ch_conf (v64uint8 a, v64int8 b, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | addmac_conv_8x8_4ch_conf (v64uint8 a, v64int8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | addmsc_conv_8x8_4ch_conf (v64uint8 a, v64int8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submac_conv_8x8_4ch_conf (v64uint8 a, v64int8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submsc_conv_8x8_4ch_conf (v64uint8 a, v64int8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | mac_conv_8x8_4ch_conf (v64int8 a, v64uint8 b, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | msc_conv_8x8_4ch_conf (v64int8 a, v64uint8 b, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | negmsc_conv_8x8_4ch_conf (v64int8 a, v64uint8 b, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | negmac_conv_8x8_4ch_conf (v64int8 a, v64uint8 b, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | addmac_conv_8x8_4ch_conf (v64int8 a, v64uint8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | addmsc_conv_8x8_4ch_conf (v64int8 a, v64uint8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submac_conv_8x8_4ch_conf (v64int8 a, v64uint8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submsc_conv_8x8_4ch_conf (v64int8 a, v64uint8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | mac_conv_8x8_4ch_conf (v64int8 a, v64int8 b, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | msc_conv_8x8_4ch_conf (v64int8 a, v64int8 b, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | negmsc_conv_8x8_4ch_conf (v64int8 a, v64int8 b, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | negmac_conv_8x8_4ch_conf (v64int8 a, v64int8 b, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | addmac_conv_8x8_4ch_conf (v64int8 a, v64int8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | addmsc_conv_8x8_4ch_conf (v64int8 a, v64int8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submac_conv_8x8_4ch_conf (v64int8 a, v64int8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submsc_conv_8x8_4ch_conf (v64int8 a, v64int8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
Convolution of (8x8) matrix with (8x1) kernel and 4 channels with dynamic sign and dynamic negation of multiplication result | |
v32acc32 | mul_conv_8x8_4ch_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, int sub_mul) |
v32acc32 | negmul_conv_8x8_4ch_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, int sub_mul) |
v32acc32 | mac_conv_8x8_4ch_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | msc_conv_8x8_4ch_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | negmsc_conv_8x8_4ch_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | negmac_conv_8x8_4ch_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | addmac_conv_8x8_4ch_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | addmsc_conv_8x8_4ch_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submac_conv_8x8_4ch_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submsc_conv_8x8_4ch_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | mul_conv_8x8_4ch_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, int sub_mul) |
v32acc32 | negmul_conv_8x8_4ch_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, int sub_mul) |
v32acc32 | mac_conv_8x8_4ch_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | msc_conv_8x8_4ch_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | negmsc_conv_8x8_4ch_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | negmac_conv_8x8_4ch_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | addmac_conv_8x8_4ch_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | addmsc_conv_8x8_4ch_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submac_conv_8x8_4ch_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submsc_conv_8x8_4ch_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | mul_conv_8x8_4ch_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, int sub_mul) |
v32acc32 | negmul_conv_8x8_4ch_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, int sub_mul) |
v32acc32 | mac_conv_8x8_4ch_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | msc_conv_8x8_4ch_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | negmsc_conv_8x8_4ch_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | negmac_conv_8x8_4ch_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | addmac_conv_8x8_4ch_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | addmsc_conv_8x8_4ch_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submac_conv_8x8_4ch_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submsc_conv_8x8_4ch_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | mul_conv_8x8_4ch_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, int sub_mul) |
v32acc32 | negmul_conv_8x8_4ch_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, int sub_mul) |
v32acc32 | mac_conv_8x8_4ch_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | msc_conv_8x8_4ch_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | negmsc_conv_8x8_4ch_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | negmac_conv_8x8_4ch_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | addmac_conv_8x8_4ch_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | addmsc_conv_8x8_4ch_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submac_conv_8x8_4ch_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submsc_conv_8x8_4ch_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
Convolution of (32x8) matrix with (8x1) kernel with dynamic negation of multiplication result | |
v32acc32 | mul_conv_32x8_conf (v64uint8 a, v64uint8 b, int sub_mul) |
v32acc32 | negmul_conv_32x8_conf (v64uint8 a, v64uint8 b, int sub_mul) |
v32acc32 | mul_conv_32x8_conf (v64uint8 a, v64int8 b, int sub_mul) |
v32acc32 | negmul_conv_32x8_conf (v64uint8 a, v64int8 b, int sub_mul) |
v32acc32 | mul_conv_32x8_conf (v64int8 a, v64uint8 b, int sub_mul) |
v32acc32 | negmul_conv_32x8_conf (v64int8 a, v64uint8 b, int sub_mul) |
v32acc32 | mul_conv_32x8_conf (v64int8 a, v64int8 b, int sub_mul) |
v32acc32 | negmul_conv_32x8_conf (v64int8 a, v64int8 b, int sub_mul) |
Convolution of (32x8) matrix with (8x1) kernel with dynamic negation of multiplication result, zeroing of acc1, and negation of acc1 | |
v32acc32 | mac_conv_32x8_conf (v64uint8 a, v64uint8 b, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | msc_conv_32x8_conf (v64uint8 a, v64uint8 b, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | negmsc_conv_32x8_conf (v64uint8 a, v64uint8 b, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | negmac_conv_32x8_conf (v64uint8 a, v64uint8 b, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | addmac_conv_32x8_conf (v64uint8 a, v64uint8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | addmsc_conv_32x8_conf (v64uint8 a, v64uint8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submac_conv_32x8_conf (v64uint8 a, v64uint8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submsc_conv_32x8_conf (v64uint8 a, v64uint8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | mac_conv_32x8_conf (v64uint8 a, v64int8 b, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | msc_conv_32x8_conf (v64uint8 a, v64int8 b, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | negmsc_conv_32x8_conf (v64uint8 a, v64int8 b, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | negmac_conv_32x8_conf (v64uint8 a, v64int8 b, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | addmac_conv_32x8_conf (v64uint8 a, v64int8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | addmsc_conv_32x8_conf (v64uint8 a, v64int8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submac_conv_32x8_conf (v64uint8 a, v64int8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submsc_conv_32x8_conf (v64uint8 a, v64int8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | mac_conv_32x8_conf (v64int8 a, v64uint8 b, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | msc_conv_32x8_conf (v64int8 a, v64uint8 b, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | negmsc_conv_32x8_conf (v64int8 a, v64uint8 b, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | negmac_conv_32x8_conf (v64int8 a, v64uint8 b, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | addmac_conv_32x8_conf (v64int8 a, v64uint8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | addmsc_conv_32x8_conf (v64int8 a, v64uint8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submac_conv_32x8_conf (v64int8 a, v64uint8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submsc_conv_32x8_conf (v64int8 a, v64uint8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | mac_conv_32x8_conf (v64int8 a, v64int8 b, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | msc_conv_32x8_conf (v64int8 a, v64int8 b, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | negmsc_conv_32x8_conf (v64int8 a, v64int8 b, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | negmac_conv_32x8_conf (v64int8 a, v64int8 b, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | addmac_conv_32x8_conf (v64int8 a, v64int8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | addmsc_conv_32x8_conf (v64int8 a, v64int8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submac_conv_32x8_conf (v64int8 a, v64int8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submsc_conv_32x8_conf (v64int8 a, v64int8 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
Convolution of (32x8) matrix with (8x1) kernel with dynamic sign and dynamic negation of multiplication result | |
v32acc32 | mul_conv_32x8_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, int sub_mul) |
v32acc32 | negmul_conv_32x8_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, int sub_mul) |
v32acc32 | mac_conv_32x8_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | msc_conv_32x8_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | negmsc_conv_32x8_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | negmac_conv_32x8_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | addmac_conv_32x8_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | addmsc_conv_32x8_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submac_conv_32x8_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submsc_conv_32x8_conf (v64uint8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | mul_conv_32x8_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, int sub_mul) |
v32acc32 | negmul_conv_32x8_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, int sub_mul) |
v32acc32 | mac_conv_32x8_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | msc_conv_32x8_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | negmsc_conv_32x8_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | negmac_conv_32x8_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | addmac_conv_32x8_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | addmsc_conv_32x8_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submac_conv_32x8_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submsc_conv_32x8_conf (v64uint8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | mul_conv_32x8_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, int sub_mul) |
v32acc32 | negmul_conv_32x8_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, int sub_mul) |
v32acc32 | mac_conv_32x8_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | msc_conv_32x8_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | negmsc_conv_32x8_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | negmac_conv_32x8_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | addmac_conv_32x8_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | addmsc_conv_32x8_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submac_conv_32x8_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submsc_conv_32x8_conf (v64int8 a, int sgn_x, v64uint8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | mul_conv_32x8_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, int sub_mul) |
v32acc32 | negmul_conv_32x8_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, int sub_mul) |
v32acc32 | mac_conv_32x8_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | msc_conv_32x8_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
v32acc32 | negmsc_conv_32x8_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | negmac_conv_32x8_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
v32acc32 | addmac_conv_32x8_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | addmsc_conv_32x8_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submac_conv_32x8_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 | submsc_conv_32x8_conf (v64int8 a, int sgn_x, v64int8 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
v32acc32 addmac_4x8_8x8 | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 addmac_4x8_8x8 | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 addmac_4x8_8x8 | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 addmac_4x8_8x8 | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 addmac_4x8_8x8_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmac_4x8_8x8_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmac_4x8_8x8_conf | ( | v64int8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmac_4x8_8x8_conf | ( | v64int8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmac_4x8_8x8_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmac_4x8_8x8_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmac_4x8_8x8_conf | ( | v64uint8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmac_4x8_8x8_conf | ( | v64uint8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmac_conv_32x8 | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 addmac_conv_32x8 | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 addmac_conv_32x8 | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 addmac_conv_32x8 | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 addmac_conv_32x8_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmac_conv_32x8_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmac_conv_32x8_conf | ( | v64int8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmac_conv_32x8_conf | ( | v64int8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmac_conv_32x8_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmac_conv_32x8_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmac_conv_32x8_conf | ( | v64uint8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmac_conv_32x8_conf | ( | v64uint8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmac_conv_4x4_8ch | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 addmac_conv_4x4_8ch | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 addmac_conv_4x4_8ch | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 addmac_conv_4x4_8ch | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 addmac_conv_4x4_8ch_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmac_conv_4x4_8ch_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmac_conv_4x4_8ch_conf | ( | v64int8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmac_conv_4x4_8ch_conf | ( | v64int8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmac_conv_4x4_8ch_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmac_conv_4x4_8ch_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmac_conv_4x4_8ch_conf | ( | v64uint8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmac_conv_4x4_8ch_conf | ( | v64uint8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmac_conv_8x8_4ch | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 addmac_conv_8x8_4ch | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 addmac_conv_8x8_4ch | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 addmac_conv_8x8_4ch | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 addmac_conv_8x8_4ch_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmac_conv_8x8_4ch_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmac_conv_8x8_4ch_conf | ( | v64int8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmac_conv_8x8_4ch_conf | ( | v64int8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmac_conv_8x8_4ch_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmac_conv_8x8_4ch_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmac_conv_8x8_4ch_conf | ( | v64uint8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmac_conv_8x8_4ch_conf | ( | v64uint8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmac_elem_32_2 | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 addmac_elem_32_2 | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 addmac_elem_32_2 | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 addmac_elem_32_2 | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 addmac_elem_32_2_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmac_elem_32_2_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmac_elem_32_2_conf | ( | v64int8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmac_elem_32_2_conf | ( | v64int8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmac_elem_32_2_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmac_elem_32_2_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmac_elem_32_2_conf | ( | v64uint8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmac_elem_32_2_conf | ( | v64uint8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmsc_4x8_8x8 | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 addmsc_4x8_8x8 | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 addmsc_4x8_8x8 | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 addmsc_4x8_8x8 | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 addmsc_4x8_8x8_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result. |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmsc_4x8_8x8_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result. |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmsc_4x8_8x8_conf | ( | v64int8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmsc_4x8_8x8_conf | ( | v64int8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmsc_4x8_8x8_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result. |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmsc_4x8_8x8_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result. |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmsc_4x8_8x8_conf | ( | v64uint8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmsc_4x8_8x8_conf | ( | v64uint8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmsc_conv_32x8 | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 addmsc_conv_32x8 | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 addmsc_conv_32x8 | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 addmsc_conv_32x8 | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 addmsc_conv_32x8_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result. |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmsc_conv_32x8_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result. |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmsc_conv_32x8_conf | ( | v64int8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmsc_conv_32x8_conf | ( | v64int8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmsc_conv_32x8_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result. |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmsc_conv_32x8_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result. |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmsc_conv_32x8_conf | ( | v64uint8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmsc_conv_32x8_conf | ( | v64uint8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmsc_conv_4x4_8ch | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 addmsc_conv_4x4_8ch | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 addmsc_conv_4x4_8ch | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 addmsc_conv_4x4_8ch | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 addmsc_conv_4x4_8ch_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result. |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmsc_conv_4x4_8ch_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result. |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmsc_conv_4x4_8ch_conf | ( | v64int8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmsc_conv_4x4_8ch_conf | ( | v64int8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmsc_conv_4x4_8ch_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result. |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmsc_conv_4x4_8ch_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result. |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmsc_conv_4x4_8ch_conf | ( | v64uint8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmsc_conv_4x4_8ch_conf | ( | v64uint8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmsc_conv_8x8_4ch | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 addmsc_conv_8x8_4ch | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 addmsc_conv_8x8_4ch | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 addmsc_conv_8x8_4ch | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 addmsc_conv_8x8_4ch_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result. |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmsc_conv_8x8_4ch_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result. |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmsc_conv_8x8_4ch_conf | ( | v64int8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmsc_conv_8x8_4ch_conf | ( | v64int8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmsc_conv_8x8_4ch_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result. |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmsc_conv_8x8_4ch_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result. |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmsc_conv_8x8_4ch_conf | ( | v64uint8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmsc_conv_8x8_4ch_conf | ( | v64uint8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmsc_elem_32_2 | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 addmsc_elem_32_2 | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 addmsc_elem_32_2 | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 addmsc_elem_32_2 | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 addmsc_elem_32_2_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result. |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmsc_elem_32_2_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result. |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmsc_elem_32_2_conf | ( | v64int8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmsc_elem_32_2_conf | ( | v64int8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmsc_elem_32_2_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result. |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmsc_elem_32_2_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result. |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmsc_elem_32_2_conf | ( | v64uint8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 addmsc_elem_32_2_conf | ( | v64uint8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
v32acc32 mac_4x8_8x8_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 mac_4x8_8x8_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 mac_4x8_8x8_conf | ( | v64int8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 mac_4x8_8x8_conf | ( | v64int8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 mac_4x8_8x8_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 mac_4x8_8x8_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 mac_4x8_8x8_conf | ( | v64uint8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 mac_4x8_8x8_conf | ( | v64uint8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
v32acc32 mac_conv_32x8_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 mac_conv_32x8_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 mac_conv_32x8_conf | ( | v64int8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 mac_conv_32x8_conf | ( | v64int8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 mac_conv_32x8_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 mac_conv_32x8_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 mac_conv_32x8_conf | ( | v64uint8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 mac_conv_32x8_conf | ( | v64uint8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
v32acc32 mac_conv_4x4_8ch_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 mac_conv_4x4_8ch_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 mac_conv_4x4_8ch_conf | ( | v64int8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 mac_conv_4x4_8ch_conf | ( | v64int8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 mac_conv_4x4_8ch_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 mac_conv_4x4_8ch_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 mac_conv_4x4_8ch_conf | ( | v64uint8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 mac_conv_4x4_8ch_conf | ( | v64uint8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
v32acc32 mac_conv_8x8_4ch_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 mac_conv_8x8_4ch_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 mac_conv_8x8_4ch_conf | ( | v64int8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 mac_conv_8x8_4ch_conf | ( | v64int8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 mac_conv_8x8_4ch_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 mac_conv_8x8_4ch_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 mac_conv_8x8_4ch_conf | ( | v64uint8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 mac_conv_8x8_4ch_conf | ( | v64uint8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
v32acc32 mac_elem_32_2_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 mac_elem_32_2_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 mac_elem_32_2_conf | ( | v64int8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 mac_elem_32_2_conf | ( | v64int8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 mac_elem_32_2_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 mac_elem_32_2_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 mac_elem_32_2_conf | ( | v64uint8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 mac_elem_32_2_conf | ( | v64uint8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
v32acc32 msc_4x8_8x8_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
v32acc32 msc_4x8_8x8_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
v32acc32 msc_4x8_8x8_conf | ( | v64int8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 msc_4x8_8x8_conf | ( | v64int8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 msc_4x8_8x8_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
v32acc32 msc_4x8_8x8_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
v32acc32 msc_4x8_8x8_conf | ( | v64uint8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 msc_4x8_8x8_conf | ( | v64uint8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
v32acc32 msc_conv_32x8_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
v32acc32 msc_conv_32x8_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
v32acc32 msc_conv_32x8_conf | ( | v64int8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 msc_conv_32x8_conf | ( | v64int8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 msc_conv_32x8_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
v32acc32 msc_conv_32x8_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
v32acc32 msc_conv_32x8_conf | ( | v64uint8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 msc_conv_32x8_conf | ( | v64uint8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
v32acc32 msc_conv_4x4_8ch_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
v32acc32 msc_conv_4x4_8ch_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
v32acc32 msc_conv_4x4_8ch_conf | ( | v64int8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 msc_conv_4x4_8ch_conf | ( | v64int8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 msc_conv_4x4_8ch_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
v32acc32 msc_conv_4x4_8ch_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
v32acc32 msc_conv_4x4_8ch_conf | ( | v64uint8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 msc_conv_4x4_8ch_conf | ( | v64uint8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
v32acc32 msc_conv_8x8_4ch_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
v32acc32 msc_conv_8x8_4ch_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
v32acc32 msc_conv_8x8_4ch_conf | ( | v64int8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 msc_conv_8x8_4ch_conf | ( | v64int8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 msc_conv_8x8_4ch_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
v32acc32 msc_conv_8x8_4ch_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
v32acc32 msc_conv_8x8_4ch_conf | ( | v64uint8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 msc_conv_8x8_4ch_conf | ( | v64uint8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
v32acc32 msc_elem_32_2_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
v32acc32 msc_elem_32_2_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
v32acc32 msc_elem_32_2_conf | ( | v64int8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 msc_elem_32_2_conf | ( | v64int8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 msc_elem_32_2_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
v32acc32 msc_elem_32_2_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
v32acc32 msc_elem_32_2_conf | ( | v64uint8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 msc_elem_32_2_conf | ( | v64uint8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | shift16, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
shift16 | Shift mask of input accumulator acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
a | Matrix A |
b | Matrix B |
a | Matrix A |
b | Matrix B |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
a | Matrix A |
b | Matrix B |
a | Matrix A |
b | Matrix B |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
a | Matrix A |
b | Matrix B |
sub_mul | Negation mask for multiplication result |
a | Matrix A |
b | Matrix B |
sub_mul | Negation mask for multiplication result |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
a | Matrix A |
b | Matrix B |
sub_mul | Negation mask for multiplication result |
a | Matrix A |
b | Matrix B |
sub_mul | Negation mask for multiplication result |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
a | Matrix A |
b | Matrix B |
a | Matrix A |
b | Matrix B |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
a | Matrix A |
b | Matrix B |
a | Matrix A |
b | Matrix B |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
a | Matrix A |
b | Matrix B |
sub_mul | Negation mask for multiplication result |
a | Matrix A |
b | Matrix B |
sub_mul | Negation mask for multiplication result |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
a | Matrix A |
b | Matrix B |
sub_mul | Negation mask for multiplication result |
a | Matrix A |
b | Matrix B |
sub_mul | Negation mask for multiplication result |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
a | Matrix A |
b | Matrix B |
a | Matrix A |
b | Matrix B |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
a | Matrix A |
b | Matrix B |
a | Matrix A |
b | Matrix B |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
a | Matrix A |
b | Matrix B |
sub_mul | Negation mask for multiplication result |
a | Matrix A |
b | Matrix B |
sub_mul | Negation mask for multiplication result |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
a | Matrix A |
b | Matrix B |
sub_mul | Negation mask for multiplication result |
a | Matrix A |
b | Matrix B |
sub_mul | Negation mask for multiplication result |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
a | Matrix A |
b | Matrix B |
a | Matrix A |
b | Matrix B |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
a | Matrix A |
b | Matrix B |
a | Matrix A |
b | Matrix B |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
a | Matrix A |
b | Matrix B |
sub_mul | Negation mask for multiplication result |
a | Matrix A |
b | Matrix B |
sub_mul | Negation mask for multiplication result |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
a | Matrix A |
b | Matrix B |
sub_mul | Negation mask for multiplication result |
a | Matrix A |
b | Matrix B |
sub_mul | Negation mask for multiplication result |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
a | Matrix A |
b | Matrix B |
a | Matrix A |
b | Matrix B |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
a | Matrix A |
b | Matrix B |
a | Matrix A |
b | Matrix B |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
a | Matrix A |
b | Matrix B |
sub_mul | Negation mask for multiplication result |
a | Matrix A |
b | Matrix B |
sub_mul | Negation mask for multiplication result |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
a | Matrix A |
b | Matrix B |
sub_mul | Negation mask for multiplication result |
a | Matrix A |
b | Matrix B |
sub_mul | Negation mask for multiplication result |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
v32acc32 negmac_4x8_8x8_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmac_4x8_8x8_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmac_4x8_8x8_conf | ( | v64int8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmac_4x8_8x8_conf | ( | v64int8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmac_4x8_8x8_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmac_4x8_8x8_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmac_4x8_8x8_conf | ( | v64uint8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmac_4x8_8x8_conf | ( | v64uint8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
v32acc32 negmac_conv_32x8_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmac_conv_32x8_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmac_conv_32x8_conf | ( | v64int8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmac_conv_32x8_conf | ( | v64int8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmac_conv_32x8_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmac_conv_32x8_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmac_conv_32x8_conf | ( | v64uint8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmac_conv_32x8_conf | ( | v64uint8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
v32acc32 negmac_conv_4x4_8ch_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmac_conv_4x4_8ch_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmac_conv_4x4_8ch_conf | ( | v64int8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmac_conv_4x4_8ch_conf | ( | v64int8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmac_conv_4x4_8ch_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmac_conv_4x4_8ch_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmac_conv_4x4_8ch_conf | ( | v64uint8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmac_conv_4x4_8ch_conf | ( | v64uint8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
v32acc32 negmac_conv_8x8_4ch_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmac_conv_8x8_4ch_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmac_conv_8x8_4ch_conf | ( | v64int8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmac_conv_8x8_4ch_conf | ( | v64int8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmac_conv_8x8_4ch_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmac_conv_8x8_4ch_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmac_conv_8x8_4ch_conf | ( | v64uint8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmac_conv_8x8_4ch_conf | ( | v64uint8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
v32acc32 negmac_elem_32_2_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmac_elem_32_2_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmac_elem_32_2_conf | ( | v64int8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmac_elem_32_2_conf | ( | v64int8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmac_elem_32_2_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmac_elem_32_2_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmac_elem_32_2_conf | ( | v64uint8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmac_elem_32_2_conf | ( | v64uint8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
v32acc32 negmsc_4x8_8x8_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmsc_4x8_8x8_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmsc_4x8_8x8_conf | ( | v64int8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
v32acc32 negmsc_4x8_8x8_conf | ( | v64int8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
v32acc32 negmsc_4x8_8x8_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmsc_4x8_8x8_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmsc_4x8_8x8_conf | ( | v64uint8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
v32acc32 negmsc_4x8_8x8_conf | ( | v64uint8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
v32acc32 negmsc_conv_32x8_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmsc_conv_32x8_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmsc_conv_32x8_conf | ( | v64int8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
v32acc32 negmsc_conv_32x8_conf | ( | v64int8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
v32acc32 negmsc_conv_32x8_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmsc_conv_32x8_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmsc_conv_32x8_conf | ( | v64uint8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
v32acc32 negmsc_conv_32x8_conf | ( | v64uint8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
v32acc32 negmsc_conv_4x4_8ch_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmsc_conv_4x4_8ch_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmsc_conv_4x4_8ch_conf | ( | v64int8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
v32acc32 negmsc_conv_4x4_8ch_conf | ( | v64int8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
v32acc32 negmsc_conv_4x4_8ch_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmsc_conv_4x4_8ch_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmsc_conv_4x4_8ch_conf | ( | v64uint8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
v32acc32 negmsc_conv_4x4_8ch_conf | ( | v64uint8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
v32acc32 negmsc_conv_8x8_4ch_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmsc_conv_8x8_4ch_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmsc_conv_8x8_4ch_conf | ( | v64int8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
v32acc32 negmsc_conv_8x8_4ch_conf | ( | v64int8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
v32acc32 negmsc_conv_8x8_4ch_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmsc_conv_8x8_4ch_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmsc_conv_8x8_4ch_conf | ( | v64uint8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
v32acc32 negmsc_conv_8x8_4ch_conf | ( | v64uint8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
v32acc32 negmsc_elem_32_2_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmsc_elem_32_2_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmsc_elem_32_2_conf | ( | v64int8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
v32acc32 negmsc_elem_32_2_conf | ( | v64int8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
v32acc32 negmsc_elem_32_2_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmsc_elem_32_2_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
v32acc32 negmsc_elem_32_2_conf | ( | v64uint8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
v32acc32 negmsc_elem_32_2_conf | ( | v64uint8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
a | Matrix A |
b | Matrix B |
a | Matrix A |
b | Matrix B |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
a | Matrix A |
b | Matrix B |
a | Matrix A |
b | Matrix B |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
sub_mul | Negation mask of multiplication result |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
sub_mul | Negation mask of multiplication result |
a | Matrix A |
b | Matrix B |
sub_mul | Negation mask for multiplication result. If a bit of sub_mul is set the corresponding vector lane of the output accumulator will be negated. |
a | Matrix A |
b | Matrix B |
sub_mul | Negation mask for multiplication result. If a bit of sub_mul is set the corresponding vector lane of the output accumulator will be negated. |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
sub_mul | Negation mask of multiplication result |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
sub_mul | Negation mask of multiplication result |
a | Matrix A |
b | Matrix B |
sub_mul | Negation mask for multiplication result. If a bit of sub_mul is set the corresponding vector lane of the output accumulator will be negated. |
a | Matrix A |
b | Matrix B |
sub_mul | Negation mask for multiplication result. If a bit of sub_mul is set the corresponding vector lane of the output accumulator will be negated. |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
a | Matrix A |
b | Matrix B |
a | Matrix A |
b | Matrix B |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
a | Matrix A |
b | Matrix B |
a | Matrix A |
b | Matrix B |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
sub_mul | Negation mask of multiplication result |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
sub_mul | Negation mask of multiplication result |
a | Matrix A |
b | Matrix B |
sub_mul | Negation mask for multiplication result. If a bit of sub_mul is set the corresponding vector lane of the output accumulator will be negated. |
a | Matrix A |
b | Matrix B |
sub_mul | Negation mask for multiplication result. If a bit of sub_mul is set the corresponding vector lane of the output accumulator will be negated. |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
sub_mul | Negation mask of multiplication result |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
sub_mul | Negation mask of multiplication result |
a | Matrix A |
b | Matrix B |
sub_mul | Negation mask for multiplication result. If a bit of sub_mul is set the corresponding vector lane of the output accumulator will be negated. |
a | Matrix A |
b | Matrix B |
sub_mul | Negation mask for multiplication result. If a bit of sub_mul is set the corresponding vector lane of the output accumulator will be negated. |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
a | Matrix A |
b | Matrix B |
a | Matrix A |
b | Matrix B |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
a | Matrix A |
b | Matrix B |
a | Matrix A |
b | Matrix B |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
sub_mul | Negation mask of multiplication result |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
sub_mul | Negation mask of multiplication result |
a | Matrix A |
b | Matrix B |
sub_mul | Negation mask for multiplication result. If a bit of sub_mul is set the corresponding vector lane of the output accumulator will be negated. |
a | Matrix A |
b | Matrix B |
sub_mul | Negation mask for multiplication result. If a bit of sub_mul is set the corresponding vector lane of the output accumulator will be negated. |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
sub_mul | Negation mask of multiplication result |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
sub_mul | Negation mask of multiplication result |
a | Matrix A |
b | Matrix B |
sub_mul | Negation mask for multiplication result. If a bit of sub_mul is set the corresponding vector lane of the output accumulator will be negated. |
a | Matrix A |
b | Matrix B |
sub_mul | Negation mask for multiplication result. If a bit of sub_mul is set the corresponding vector lane of the output accumulator will be negated. |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
a | Matrix A |
b | Matrix B |
a | Matrix A |
b | Matrix B |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
a | Matrix A |
b | Matrix B |
a | Matrix A |
b | Matrix B |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
sub_mul | Negation mask of multiplication result |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
sub_mul | Negation mask of multiplication result |
a | Matrix A |
b | Matrix B |
sub_mul | Negation mask for multiplication result. If a bit of sub_mul is set the corresponding vector lane of the output accumulator will be negated. |
a | Matrix A |
b | Matrix B |
sub_mul | Negation mask for multiplication result. If a bit of sub_mul is set the corresponding vector lane of the output accumulator will be negated. |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
sub_mul | Negation mask of multiplication result |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
sub_mul | Negation mask of multiplication result |
a | Matrix A |
b | Matrix B |
sub_mul | Negation mask for multiplication result. If a bit of sub_mul is set the corresponding vector lane of the output accumulator will be negated. |
a | Matrix A |
b | Matrix B |
sub_mul | Negation mask for multiplication result. If a bit of sub_mul is set the corresponding vector lane of the output accumulator will be negated. |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
a | Matrix A |
b | Matrix B |
a | Matrix A |
b | Matrix B |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
a | Matrix A |
b | Matrix B |
a | Matrix A |
b | Matrix B |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
sub_mul | Negation mask of multiplication result |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
sub_mul | Negation mask of multiplication result |
a | Matrix A |
b | Matrix B |
sub_mul | Negation mask for multiplication result. If a bit of sub_mul is set the corresponding vector lane of the output accumulator will be negated. |
a | Matrix A |
b | Matrix B |
sub_mul | Negation mask for multiplication result. If a bit of sub_mul is set the corresponding vector lane of the output accumulator will be negated. |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
sub_mul | Negation mask of multiplication result |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
sub_mul | Negation mask of multiplication result |
a | Matrix A |
b | Matrix B |
sub_mul | Negation mask for multiplication result. If a bit of sub_mul is set the corresponding vector lane of the output accumulator will be negated. |
a | Matrix A |
b | Matrix B |
sub_mul | Negation mask for multiplication result. If a bit of sub_mul is set the corresponding vector lane of the output accumulator will be negated. |
v32acc32 submac_4x8_8x8 | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 submac_4x8_8x8 | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 submac_4x8_8x8 | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 submac_4x8_8x8 | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 submac_4x8_8x8_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submac_4x8_8x8_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submac_4x8_8x8_conf | ( | v64int8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submac_4x8_8x8_conf | ( | v64int8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submac_4x8_8x8_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submac_4x8_8x8_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submac_4x8_8x8_conf | ( | v64uint8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submac_4x8_8x8_conf | ( | v64uint8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submac_conv_32x8 | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 submac_conv_32x8 | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 submac_conv_32x8 | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 submac_conv_32x8 | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 submac_conv_32x8_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submac_conv_32x8_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submac_conv_32x8_conf | ( | v64int8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submac_conv_32x8_conf | ( | v64int8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submac_conv_32x8_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submac_conv_32x8_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submac_conv_32x8_conf | ( | v64uint8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submac_conv_32x8_conf | ( | v64uint8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submac_conv_4x4_8ch | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 submac_conv_4x4_8ch | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 submac_conv_4x4_8ch | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 submac_conv_4x4_8ch | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 submac_conv_4x4_8ch_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submac_conv_4x4_8ch_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submac_conv_4x4_8ch_conf | ( | v64int8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submac_conv_4x4_8ch_conf | ( | v64int8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submac_conv_4x4_8ch_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submac_conv_4x4_8ch_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submac_conv_4x4_8ch_conf | ( | v64uint8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submac_conv_4x4_8ch_conf | ( | v64uint8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submac_conv_8x8_4ch | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 submac_conv_8x8_4ch | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 submac_conv_8x8_4ch | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 submac_conv_8x8_4ch | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 submac_conv_8x8_4ch_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submac_conv_8x8_4ch_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submac_conv_8x8_4ch_conf | ( | v64int8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submac_conv_8x8_4ch_conf | ( | v64int8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submac_conv_8x8_4ch_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submac_conv_8x8_4ch_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submac_conv_8x8_4ch_conf | ( | v64uint8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submac_conv_8x8_4ch_conf | ( | v64uint8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submac_elem_32_2 | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 submac_elem_32_2 | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 submac_elem_32_2 | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 submac_elem_32_2 | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 submac_elem_32_2_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submac_elem_32_2_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submac_elem_32_2_conf | ( | v64int8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submac_elem_32_2_conf | ( | v64int8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submac_elem_32_2_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submac_elem_32_2_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submac_elem_32_2_conf | ( | v64uint8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submac_elem_32_2_conf | ( | v64uint8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submsc_4x8_8x8 | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 submsc_4x8_8x8 | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 submsc_4x8_8x8 | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 submsc_4x8_8x8 | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 submsc_4x8_8x8_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result. |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submsc_4x8_8x8_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result. |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submsc_4x8_8x8_conf | ( | v64int8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submsc_4x8_8x8_conf | ( | v64int8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submsc_4x8_8x8_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result. |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submsc_4x8_8x8_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result. |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submsc_4x8_8x8_conf | ( | v64uint8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submsc_4x8_8x8_conf | ( | v64uint8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submsc_conv_32x8 | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 submsc_conv_32x8 | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 submsc_conv_32x8 | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 submsc_conv_32x8 | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 submsc_conv_32x8_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result. |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submsc_conv_32x8_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result. |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submsc_conv_32x8_conf | ( | v64int8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submsc_conv_32x8_conf | ( | v64int8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submsc_conv_32x8_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result. |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submsc_conv_32x8_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result. |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submsc_conv_32x8_conf | ( | v64uint8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submsc_conv_32x8_conf | ( | v64uint8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submsc_conv_4x4_8ch | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 submsc_conv_4x4_8ch | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 submsc_conv_4x4_8ch | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 submsc_conv_4x4_8ch | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 submsc_conv_4x4_8ch_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result. |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submsc_conv_4x4_8ch_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result. |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submsc_conv_4x4_8ch_conf | ( | v64int8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submsc_conv_4x4_8ch_conf | ( | v64int8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submsc_conv_4x4_8ch_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result. |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submsc_conv_4x4_8ch_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result. |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submsc_conv_4x4_8ch_conf | ( | v64uint8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submsc_conv_4x4_8ch_conf | ( | v64uint8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submsc_conv_8x8_4ch | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 submsc_conv_8x8_4ch | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 submsc_conv_8x8_4ch | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 submsc_conv_8x8_4ch | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 submsc_conv_8x8_4ch_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result. |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submsc_conv_8x8_4ch_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result. |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submsc_conv_8x8_4ch_conf | ( | v64int8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submsc_conv_8x8_4ch_conf | ( | v64int8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submsc_conv_8x8_4ch_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result. |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submsc_conv_8x8_4ch_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result. |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submsc_conv_8x8_4ch_conf | ( | v64uint8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submsc_conv_8x8_4ch_conf | ( | v64uint8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submsc_elem_32_2 | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 submsc_elem_32_2 | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 submsc_elem_32_2 | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 submsc_elem_32_2 | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
v32acc32 submsc_elem_32_2_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result. |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submsc_elem_32_2_conf | ( | v64int8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result. |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submsc_elem_32_2_conf | ( | v64int8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submsc_elem_32_2_conf | ( | v64int8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submsc_elem_32_2_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64int8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result. |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submsc_elem_32_2_conf | ( | v64uint8 | a, |
int | sgn_x, | ||
v64uint8 | b, | ||
int | sgn_y, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
sgn_x | Sign mask for matrix A |
b | Matrix B |
sgn_y | Sign mask for matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result. |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submsc_elem_32_2_conf | ( | v64uint8 | a, |
v64int8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |
v32acc32 submsc_elem_32_2_conf | ( | v64uint8 | a, |
v64uint8 | b, | ||
v32acc32 | acc1, | ||
v32acc32 | acc2, | ||
int | zero_acc1, | ||
int | sub_mul, | ||
int | sub_acc1, | ||
int | sub_acc2 | ||
) |
a | Matrix A |
b | Matrix B |
acc1 | Accumulator 1 input |
acc2 | Accumulator 2 input |
zero_acc1 | Zeroing mask for acc1 |
sub_mul | Negation mask of multiplication result |
sub_acc1 | Negation mask of acc1 |
sub_acc2 | Negation mask of acc2 |