Product Description
MicroBlaze™ is AMD 32/64-bit RISC Harvard architecture soft processor core with a rich instruction set optimized for embedded applications. The MicroBlaze soft processor solution delivers complete flexibility to select the combination of peripheral, memory and interface features that will give you the exact system you need at the lowest cost possible on a single FPGA.
Key Features and Benefits
- Over 70 user configurable options
- 3-stage pipeline for optimal footprint, 5-stage pipeline for maximum performance
- Supports either PLB or AXI interface
- Big-endian or Little-endian support
- Optional Memory Management Unit (MMU)
- Optional Floating Point Unit (FPU)
- Instruction and Data-side Cache
Resource Utilization
Support
Device Family
Design Tools
Product Description
The high-reliability MicroBlaze Triple Modular Redundancy (TMR) solution provides soft error detection, correction and recovery for MicroBlaze Processors running on AMD FPGAs.
Key Features & Benefits
- The Triple Modular Redundancy solution for MicroBlaze consists of 5 IP cores that work together to provide higher reliability processing. These cores include:
- TMR Manager controls the overall redundancy state and supervises soft error mitigation
- TMR Voter implements a self-checking majority voter that masks faults in the triplicated sub-blocks to maintain nominal functionality
- TMR Comparator implements a self-checking comparison of outputs from the triplicated sub-blocks, and generates errors in the case of mismatch
- TMR Inject implements functional level fault injection for test purposes
- TMR Soft Error Mitigation (SEM) interface encapsulates the AMD Soft Error Mitigation IP core
- Vivado IP Integrator automation simplifies the creation of a triplicated MicroBlaze subsystem