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        Partial Reconfiguration for UltraScale+

        This video reviews the Partial Reconfiguration capabilities of UltraScale+ silicon, shows new features for Partial Reconfiguration in the Vivado Design Suite, and introduces broader access to Partial Reconfiguration within Vivado System and Design Editions.

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        Xilinx Dynamic Function eXchange Training Series: Advanced Floorplanning

        This training video reviews floorplanning requirements and walks through the details of Expanded Routing, a Vivado technology that improves efficiency and routability for any Reconfigurable Partition in a DFX design.

        Xilinx Dynamic Function eXchange Training Series: Floorplanning

        This training video reviews the fundamental requirements for floorplanning Dynamic Function eXchange designs and provides techniques to improve efficiency and results for any DFX design.

        Generated Clocks

        Use the report clock networks report to determine if there are any generated clocks in a design.

        Basic Design Analysis in the Vivado IDE

        Use the various design analysis features in the Vivado Design Suite.

        UltraFast Design Methodology Checklist

        Introduces the methodology guidelines covered in this course and the UltraFast Design Methodology checklist.