Current Time 0:00
Duration 0:00
Loaded: 0%
Stream Type LIVE
Remaining Time 0:00
 
1x
    • Chapters
    • descriptions off, selected
    • captions off, selected

        How to use the Zynq-7000 Verification IP to Verify and Debug Using Simulation

        Learn how to efficiently verify designs that use Zynq-7000 Processing System using the Zynq-7000 VIP. This video introduces you to how to configure and how to simulate with the example project.

        Related Videos

        How to use AXI Verification IP to Verify and Debug your Design using Simulation

        Learn how to efficiently verify and debug AXI interfaces using the Xilinx AXI Verification IP. This video reviews the benefits of using, and how to simulate with the example design.

        AXI Interface Debug Using Vivado IP Integrator

        Learn how to efficiently debug AXI interface using the Vivado Design Suite IP Integrator. This video reviews the benefits, required debug steps and a demo to how to use the tool.

        ChipScoPy Training Series: Installation

        This video walks through the installation process for the ChipScoPy API, including the official python install, obtaining the latest version of the ChipScoPy API and installing on a Windows PC.

        ChipScoPy Training Series: Hardware Setup

        This video demonstrates how to obtain the Hardware Server and ChipScope Server from the Unified Installer and how to connect ChipScoPy to the VCK190 evaluation platform.

        Design Analysis Using Tcl Commands

        Use the various design analysis features in the Vivado Design Suite.