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        Creating a DAC System in IPI

        Steps through configuring the DAC in the RF Data Converter IP for the Zynq™ UltraScale+™ RFSoC using the Vivado IP integrator.

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        Data Converter Driver Overview

        Demonstrates how to access the documentation for the Zynq® UltraScale+™ RFSoC, which includes APIs as well as example files, through the Vitis unified software platform.

        SD-FEC IP Configuration

        Step through configuring the Soft-Decision FEC IP for the Zynq® UltraScale+™ RFSoC using the Vivado IP integrator.

        Creating an ADC System in IPI

        Steps through configuring the ADC in the RF Data Converter IP for the Zynq™ UltraScale+™ RFSoC using the Vivado IP integrator.

        RF Data Converter Power Estimation

        Illustrates using the Xilinx Power Estimator tool to predict power consumption for the RF Data Converter IP for the Zynq® UltraScale+™ RFSoC.

        How to Implement MIPI D-PHY Solutions

        This video covers a brief overview of MIPI and Xilinx MIPI solutions along with how to find more information on the D-PHY MIPI solutions available with Xilinx FPGAs. The video also gives an example of running a IBIS hardware simulation to show how robust MIPI can be from a Xilinx FPGA.